1. Field of the Invention
This invention relates to a single side, multiple step orientation dependent etching process for the fabrication of three dimensional structures from silicon, and more particularly to the use of this process for the mass production of ink jet printheads.
2. Description of the Prior Art
A fundamental physical limitation of orientation etching (ODE) in silicon is that {111} crystal planes etch very slowly, while all other crystal planes etch rapidly. Consequently, only rectangles and squares can be generated in (100) silicon material or wafers with a high degree of precision. Even with rectangles and squares, the dimensional precision of the etched recesses or holes require that the edges of the mask defining the rectangles or squares be aligned with the intersection of the {111} and {100} crystal planes. In the semiconductor industry, it is frequently desirable to generate large recesses or holes in association with relatively shallow recesses, which may or may not interconnect. For example, an ink jet printhead may be made of a silicon channel plate and a heater plant. Each channel plate has a relatively large ink manifold/reservoir recess or opening and a set of parallel, shallow, elongated channel recesses connecting to the reservoir at one end and open at the other end. When aligned and bonded with the heater plate, the recesses in the channel plate become the ink reservoir and the ink channels, as described more throughly in U.S. Pat. No. Re. 32,572 discussed below.
In such printheads, it is frequently desirable to generate a large reservoir, which is often etched completely through a 15 to 20 mil thick wafer, with small perpendicularly connecting channels which may be only 1 or 2 mils deep on the same silicon substrate. A major difficulty associated with fabrication of such a structure is that the channels and reservoir must be separately etched and then subsequently joined by a variety of methods, such as isotropic etching, dicing away the silicon material between the reservoir and channel, or use of a thick film layer on the heater plate that is patterned and etched to form ink flow bypasses. Generally, such a structure is formed by etching a plurality of reservoirs in a (100) silicon wafer first, and then accurately aligning the channels to the edge of the reservoir in a second lithography step, followed by etch mask delineation and a second short ODE step sufficient to etch the depth of the plurality of sets of associated channels. An advantage of such a process is that control of channel dimension would be very high because the mask defining the channels will be undercut about 1/10 as much as would be the case when the channel and reservoir are delineated simultaneously. This is because the {111} planes have a finite etch rate and the etch time for channels for the two cases is about a factor of 10 different. In fact, in order to etch through 20 mils of silicon in a short time, the etch is optimized for rapid etching and etch anisotropy suffers. If the shallow depth etch was done in a separate step, anisotropy could be increased from 1:100 to 1:400 or higher, depending on desired accuracy. The problem with such a two-step process is that it is difficult or impossible to do a second lithography step on an ODE etched wafer due to the large steps and/or etched through holes. The resist mask is very non-uniform and cannot be exposed for many reasons.
U.S. Pat. No. Re. 32,572 to Hawkins et al discloses a thermal ink jet printhead and method of fabrication. A plurality of printheads may be concurrently fabricated by forming a plurality of sets of heating elements with their individual addressing electrodes on one silicon wafer or other substrate and etching corresponding sets of grooves which may serve as ink channels with a common reservoir in another silicon wafer. The two wafers are aligned and bonded together, so that each channel has a heating element. The individual printheads are obtained by milling away the unwanted silicon material in the channel wafer to expose the addressing electrode terminals on the heating element wafer and then dicing the heating element wafer to obtain separate printheads.
U.S. Pat. No. 4,612,554 to Poleshuk discloses an ink jet printhead comprising two identical parts and a method for producing it. A plurality of V-shaped grooves are anisotropically etched on each part of the printhead between a linear array of heating elements. The grooves allow the parts to be mated in an automatically self-aligned manner.
U.S. Pat. No. 4,638,337 to Torpey et al discloses a two-part ink jet printhead comprising a channel plate and a heater plate. A thick film insulative layer is placed over the passivation layer for the circuitry on the heater plate and etched to open recesses therein above the heating elements and electrode terminals. This effectively places the heating elements in a pit, the walls of which inhibit bubble growth in the direction parallel with the direction of ink flow in the channels and promotes the bubbles growth in a direction normal to the heating elements. The net result is that "blow out" of the bubble is eliminated and the consequent ingestion of air prevented.
U.S. Pat. No. 4,639,748 to Drake et al discloses a two-part ink jet printhead comprising a channel plate and a heater plate. The manifold recess in the channel plate has an internal chamber recess provided by an enclosing wall inside of and surrounded by the manifold recess with the internal chamber wall having small passageways at its upper end, so that, when mated with the heater plate, ink is filtered when it flows from the internal chamber to the manifold through the small passageways because each of the small passageways have a flow area smaller than each of the nozzle flow areas. However, the total flow area of the small passageways is greater than the total flow area of the nozzles.
Application Ser. No. 082,417, filed Aug. 6, 1987, now U.S. Pat. No. 4,789,425, entitled "Thermal Ink Jet Printhead and Fabricating Process Therefor", to Drake et al, discloses a method for fabricating a roofshooter type thermal ink jet printhead comprising a channel or nozzle plate and a heater plate. The heater plate is silicon and is etched from the side opposite the one with the heat elements and addressing electrodes to form elongated openings through the heater plate which are precisely aligned with the heating elements. Once the passivation layer over and the insulative layer under the heating elements and addressing electrodes are removed from the bottom of the etched openings in the heater plates, the etched openings may serve as both ink inlets and reservoirs for the printhead.
Application Ser. No. 115,271, filed Nov. 2, 1987, now U.S. Pat. No. 4,774,530, entitled "An Improved Ink Jet Printhead", to Hawkins, discloses a two-part ink jet printhead comprising a channel plate and a heater plate. An elongated opening is formed in a thick film layer placed on the heater plate having sufficient size and location to provide an ink flow passageway between the manifold and the channels in the channel plate without requiring the removal of the channel closed ends which are adjacent the manifold by a dicing or etching operation.
Pending application Ser. No. 137,283, filed Dec. 23, 1987, entitled "Large Array Thermal Ink Jet Printhead", to Drake et al, discloses a large pagewidth array ink jet printhead comprising a heater plate and a channel plate. The channel plate is composed of a juxtaposed plurality of identical silicon sub-units, each having parallel opposite sides formed along the {111} crystal planes which permit accurate end-to-end assembly to produce the pagewidth channel plate.
Application Ser. No. 185,600, filed Apr. 25, 1988, now U.S. Pat. No. 4,822,755, entitled "Method of Fabricating Large Array Semiconductor Arrays", to Hawkins et al, discloses a method for separating integrated circuit chips formed on crystalline substrates. A plurality of vertical trenches are formed along predetermined intersecting lateral boundaries on the top surface of the substrate by a reactive ion etch process. The trenches are filled with an etchable material to produce a flat surface for forming the circuitry on the top surface of the substrate and passivating it. A plurality of grooves are etched on the back surface of the substrate in general alignment with the vertical trenches, the etching producing grooves which intersect the trenches and remove the etchable material. Thus, the combined action of the top and bottom etching steps separate the integrated circuits.